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32 Mbit SPI Serial Flash
A Microchip Technology Company
SST25VF032B
Data Sheet
Write-Enable (WREN)
The Write-Enable (WREN) instruction sets the Write-Enable-Latch bit in the Status Register to ‘1’
allowing Write operations to occur. The WREN instruction must be executed prior to any Write (Pro-
gram/Erase) operation. The WREN instruction may also be used to allow execution of the Write-Sta-
tus-Register (WRSR) instruction; however, the Write-Enable-Latch bit in the Status Register will be
cleared upon the rising edge CE# of the WRSR instruction. CE# must be driven high before the WREN
instruction is executed.
CE#
MODE 3
0 1 2 3 4 5 6 7
SCK
SI
SO
MODE 0
06
MSB
HIGH IMPEDANCE
1327 F18.0
Figure 17: Write Enable (WREN) Sequence
Write-Disable (WRDI)
The Write-Disable (WRDI) instruction resets the Write-Enable-Latch bit and AAI bit to ‘0,’ therefore,
preventing any new Write operations. The WRDI instruction will not terminate any programming opera-
tion in progress. Any program operation in progress may continue up to T BP after executing the WRDI
instruction. CE# must be driven high before the WRDI instruction is executed.
CE#
MODE 3
0 1 2 3 4 5 6 7
SCK
SI
SO
MODE 0
04
MSB
HIGH IMPEDANCE
1327 F19.0
Figure 18: Write Disable (WRDI) Sequence
?2011 Silicon Storage Technology, Inc.
18
DS25071A
12/11
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